Philips Semiconductors Programmable Logic Devices

Product specification

PLUS16R8D/-7 SERIES

PAL devices

16L8, 16R8, 16R6, 16R4

September 10, 1993

49

OUTPUT REGISTER PRELOAD

VOH

REGISTERED I/O

INPUT

OUTPUT

VOL

VIH

VIL

VIHH

VIL

VIH

VIL

PIN 1 CLOCK

PIN 11 OE

td

tsu

tw

td

td

NOTE:

td = tsu = tw = 100ns to 1000ns.

VIHH = 10.25V to 10.75V.

The output registers can be preloaded to any desired state during device testing. This permits any state to be tested without having to step

through the entire state-machine sequence. Each register is preloaded individually by following the steps given below.

Step 1.

Step 2.

Step 3.

Pulse Pin 1, clocking in preload data.

Step 4.

Pin number references for DIP package.