MCP3910 datasheet(36/90 Pages) MICROCHIP

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MCP3910

DS20005116D-page 36

 2012-2020 Microchip Technology Inc.

5.5

ADC Output Coding

The second-order modulator, SINC3 + SINC1 filter,

PGA, VREF and the analog input structure, all work

together to produce the device transfer function for the

Analog-to-Digital conversion (see Equation 5-3).

Each channel data are calculated on 24 bits (23 bits

plus sign) and coded in two’s complement format, MSB

first. The output format can then be modified by the

WIDTH_DATA[1:0] settings in the STATUSCOM

(see Section 9.5 “STATUSCOM Register – Status

and Communication Register”

for more information).

In case of positive saturation (CHn+ – CHn- > VREF/1.5),

the output is locked to 7FFFFF for 24-bit mode. In case

of negative saturation (CHn+ – CHn- < -VREF/1.5), the

output code is locked to 800000 for 24-bit mode.

Equation 5-3 is only true for DC inputs. For AC inputs,

this transfer function needs to be multiplied by the

transfer function of the SINC3 + SINC1 filter (see

Equation 5-1 and Equation 5-3).

EQUATION 5-3:

For data formats other than the default 24-bit format,

Equation 5-3 should be multiplied by a scaling factor,

depending on the data format used (defined by

WIDTH_DATA[1:0]).

The data

format and the

associated scaling factors are given in Figure 5-6.

FIGURE 5-6:

Output Data Formats.

For 24-Bit Mode, WIDTH_DATA[1:0] = 01 (Default)









DATA_CHn =

(CHn+ – CHn-)

VREF+ – VREF-

 8,388.608  G  1.5

WIDTH_DATA<1:0> =

32-Bit with Sign Extension

DATA

[23]

DATA

[23:16]

DATA

[15:8]

DATA

[7:0]

WIDTH_DATA<1:0> =

32-Bit with Zeros Padded

0x00

DATA

[23:16]

DATA

[7:0]

DATA

[15:8]

WIDTH_DATA<1:0> =

24-Bit

DATA

[23:16]

DATA

[15:8]

DATA

[7:0]

WIDTH_DATA<1:0> =

16-Bit

DATA

[15:8]

DATA

[23:16]

Rounded

Unformatted ADC Data

DATA

[23:16]

DATA

[15:8]

DATA

[7:0]

x1/256

x256

Scaling

Factor

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