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STV223XD Fiches technique(PDF) 40 Page - STMicroelectronics |
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STV223XD Fiches technique(HTML) 40 Page - STMicroelectronics |
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40 / 76 page ![]() STV223XD/224XC - I²C BUS SPECIFICATIONS 40/76 5 I²C BUS SPECIFICATIONS Data transfers follow the usual I²C format: after the start condition (S), a 7-bit slave address is sent, followed by an eight-bit which is a data direction bit (W). An 8-bit sub-address is sent to select a regis- ter, followed by an 8-bit data word to be included in the register. The IC’s I²C bus decoder permits the automatic in- crementation mode in write mode. The circuit operates up to clock frequencies of 400 kHz. String Format Write only mode (S = start condition, P = stop condition, A = acknowledge) Read only mode Slave Address S SLAVE ADDRESS 0 A SUB-ADDRESS A DATA A P S SLAVE ADDRESS 1 A DATA 0 A DATA 1 A DATA 2 A DATA 3 A P Address A7 A6 A5 A4 A3 A2 A1 A0 Value 1000101 X Write Address: 10001010 Read Address: 10001011 |
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