STM32U5A5QJI datasheet(99/382 Pages) STMICROELECTRONICS

No de pièce	STM32U5A5QJI

Description	Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI, crypto

PDF	382 Pages

Scroll/Zoom	100%

Fabricant	STMICROELECTRONICS [STMicroelectronics]

Site Internet	http://www.st.com

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99 / 382 page

DS13543 Rev 1

99/382

STM32U5Axxx

Functional overview

3.57

Development support

3.57.1

Serial-wire/JTAG debug port (SWJ-DP)

The Arm SWJ-DP interface is embedded and is a combined JTAG and serial-wire debug

port that enables either a serial wire debug or a JTAG probe to be connected to the target.

Debug is performed using two pins only instead of five required by the JTAG (JTAG pins can

be re-used as GPIO with alternate function): the JTAG TMS and TCK pins are shared with

SWDIO and SWCLK, respectively, and a specific sequence on the TMS pin is used to

switch between JTAG-DP and SW-DP.

3.57.2

Embedded Trace Macrocell

The Arm Embedded Trace Macrocell (ETM) provides a greater visibility of the instruction

and data flow inside the CPU core by streaming compressed data at a very high rate from

the devices through a small number of ETM pins to an external hardware trace port analyzer

(TPA) device.

Real-time instruction and data flow activity be recorded and then formatted for display on

the host computer that runs the debugger software. TPA hardware is commercially available

from common development tool vendors.

The ETM operates with third party debugger software tools.

STM32U5A5QJI Fiches technique(PDF) 99 Page - STMicroelectronics