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M95640-R Fiches technique(PDF) 25 Page - STMicroelectronics |
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M95640-R Fiches technique(HTML) 25 Page - STMicroelectronics |
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25 / 53 page ![]() DocID16877 Rev 19 25/53 M95640-W M95640-R M95640-DF Instructions 41 Note: The self-timed write cycle tW is internally executed as a sequence of two consecutive events: [Erase addressed byte(s)], followed by [Program addressed byte(s)]. An erased bit is read as “0” and a programmed bit is read as “1”. Figure 14. Page Write (WRITE) sequence 1. Depending on the memory size, as shown in Table 4, the most significant address bits are Don’t Care. |
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