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JNP-40G-AOC-30M-C Fiches technique(PDF) 4 Page - ATGBICS by Approved Technology |
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JNP-40G-AOC-30M-C Fiches technique(HTML) 4 Page - ATGBICS by Approved Technology |
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4 / 9 page ![]() ATGBICS® All rights reserved. EOE Ref: ATGBICS_JNP-40G-AOC-30M-C_V1Page 4 of 9 Product Datasheet Pin Descriptions PIN Logic Symbol Name/Description Note 1 GND Ground 1 2 CML-I Tx2n Transmitter Inverted Data Input 3 CML-I Tx2p Transmitter Non-Inverted Data output 4 GND Ground 1 5 CML-I Tx4n Transmitter Inverted Data Input 6 CML-I Tx4p Transmitter Non-Inverted Data output 7 GND Ground 1 8 LVTLL-I ModSelL Module Select 9 LVTLL-I ResetL Module Reset 10 VccRx ﹢ 3.3V Power Supply Receiver 2 11 LVCMOS-I/O SCL 2-Wire Serial Interface Clock 12 LVCMOS-I/O SDA 2-Wire Serial Interface Data 13 GND Ground 14 CML-O Rx3p Receiver Non-Inverted Data Output 15 CML-O Rx3n Receiver Inverted Data Output 16 GND Ground 1 17 CML-O Rx1p Receiver Non-Inverted Data Output 18 CML-O Rx1n Receiver Inverted Data Output 19 GND Ground 1 20 GND Ground 1 21 CML-O Rx2n Receiver Inverted Data Output 22 CML-O Rx2p Receiver Non-Inverted Data Output |
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