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LSM6DSOX Fiches technique(PDF) 85 Page - STMicroelectronics |
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LSM6DSOX Fiches technique(HTML) 85 Page - STMicroelectronics |
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85 / 199 page ![]() 9.56 INT_DUR2 (5Ah) Tap recognition function setting register (r/w). Table 154. INT_DUR2 register DUR3 DUR2 DUR1 DUR0 QUIET1 QUIET0 SHOCK1 SHOCK0 Table 155. INT_DUR2 register description DUR[3:0] Duration of maximum time gap for double tap recognition. Default: 0000 When double tap recognition is enabled, this register expresses the maximum time between two consecutive detected taps to determine a double tap event. The default value of these bits is 0000b which corresponds to 16*ODR_XL time. If the DUR[3:0] bits are set to a different value, 1LSB corresponds to 32*ODR_XL time. QUIET[1:0] Expected quiet time after a tap detection. Default value: 00 Quiet time is the time after the first detected tap in which there must not be any overthreshold event. The default value of these bits is 00b which corresponds to 2*ODR_XL time. If the QUIET[1:0] bits are set to a different value, 1LSB corresponds to 4*ODR_XL time. SHOCK[1:0] Maximum duration of overthreshold event. Default value: 00 Maximum duration is the maximum time of an overthreshold signal detection to be recognized as a tap event. The default value of these bits is 00b which corresponds to 4*ODR_XL time. If the SHOCK[1:0] bits are set to a different value, 1LSB corresponds to 8*ODR_XL time. 9.57 WAKE_UP_THS (5Bh) Single/double-tap selection and wake-up configuration (r/w) Table 156. WAKE_UP_THS register SINGLE_ DOUBLE_TAP USR_OFF _ON_WU WK_THS5 WK_THS4 WK_THS3 WK_THS2 WK_THS1 WK_THS0 Table 157. WAKE_UP_THS register description SINGLE_DOUBLE_TAP Single/double-tap event enable. Default value: 0 (0: only single-tap event enabled; 1: both single and double-tap events enabled) USR_OFF_ON_WU Drives the low-pass filtered data with user offset correction (instead of high-pass filtered data) to the wakeup function. WK_THS[5:0] Threshold for wakeup: 1 LSB weight depends on WAKE_THS_W in WAKE_UP_DUR (5Ch). Default value: 000000 LSM6DSOX INT_DUR2 (5Ah) DS12814 - Rev 3 page 85/199 |
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