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XIO2000 Fiches technique(PDF) 29 Page - Texas Instruments |
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XIO2000 Fiches technique(HTML) 29 Page - Texas Instruments |
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29 / 150 page ![]() Feature/Protocol Descriptions 17 November 2005 SCPS097B VDD_15 and VDDA_15 VDD_33 and VDDA_33 VCCP REFCLK PERST Figure 3−3. Power-Down Sequence 3.2 Bridge Reset Features There are five bridge reset options that include internally-generated power-on reset, resets generated by asserting input terminals, and software-initiated resets that are controlled by sending a PCI Express hot reset or setting a configuration register bit. Table 3−1 identifies these reset sources and describes how the bridge responds to each reset. |
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