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L99MOD53XP Fiches technique(PDF) 16 Page - STMicroelectronics |
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L99MOD53XP Fiches technique(HTML) 16 Page - STMicroelectronics |
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16 / 35 page ![]() Electrical specifications L99MOD53XP 16/35 DS12617 Rev 5 Figure 3. SPI - transfer timing diagram Figure 4. SPI - input timing Table 17. CSN timing Symbol Parameter Test condition Min. Typ. Max. Unit tCSN_HI,stb CSN HI time, switching from standby mode Transfer of SPI command to input register 20 µs tCSN_HI,min CSN HI time, active mode Transfer of SPI command to input register 4µs 1 2 345 6 7 0 01 12 3 4 56 7 0 12 3 4 56 7 0 01 01 CSN CLK DI DO Input Data Register CSN high to low: DO enabled time DI: data will be accepted on the rising edge of CLK signal time time time time DO: data will change on the falling edge of CLK signal fault bit CSN low to high: actual data is transferred to output power switches a t a d w e n a t a d d l o 23 22 21 20 19 18 23 22 21 20 19 18 23 22 21 20 19 18 X X X X X X 12 3 4 56 7 0 12 3 4 56 7 0 23 X X GADG1211181327PS 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC Valid Valid CSN CLK DI t set CSN t CLKH t se t CLK t CLKL t hold DI t set DI GADG1511181335PS |
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