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PC8374L Fiches technique(PDF) 78 Page - National Semiconductor (TI) |
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PC8374L Fiches technique(HTML) 78 Page - National Semiconductor (TI) |
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78 / 239 page ![]() 3.0 Device Architecture and Configuration (Continued) www.national.com 78 Revision1.1 3.14.7 GPIO Mode Select Register (GPMODE) This register controls the operation mode of the GPIO runtime registers (see Section 6.1 on page 110). GPMODE is reset to 01h. It also enables routing of GPIOE16 input to GPIOE11 (or GPO11) output. Power Well: VSB3 Location: Index F8h Type: R/W or RO Bit 76543210 Name GPIN2GPO Reserved SEPDIO Reset 00000001 Bit Description 7 GPIN2GPO. Route GPIOE16 input pin to GPIOE11 (or GPO11) output pin. 0: Routing disabled (default) 1: Routing enabled 6-1 Reserved. 0 SEPDIO (Separate Data I/O Select). Selects the operation mode of the GPIO runtime registers by controlling the GPDO, GPEVEN and GPEVST runtime registers to read-only. 0: Common Data I/O mode (GPDO, GPEVEN and GPEVST registers are read-only, and data written to them is ignored) 1: Separate Data I/O mode (default) Winbond Electronics Corp. Advanced PC Product Center |
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