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ADP5092ACPZ-1-R7 Fiches technique(PDF) 9 Page - Analog Devices

No de pièce ADP5092ACPZ-1-R7
Description  Ultralow Power Energy Harvester PMUs with MPPT and Charge Management
PDF  28 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

ADP5092ACPZ-1-R7 Fiches technique(HTML) 9 Page - Analog Devices

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Data Sheet
ADP5091/ADP5092
Rev. A | Page 9 of 28
Pin No.1
Mnemonic
Description
ADP5091
ADP5092
19
19
PGOOD
Output Signal to Microcontroller. This pin maintains a pulled high level when SYS is higher than the
SETPG threshold.
20
20
VID
Voltage Configuration Pin for REG_OUT. This pin sets up to eight different regulated outputs tied
low through a resistor to AGND. The output configuration details are in Table 7.
21
21
MINOP
Minimum Operating Power. Place a resistor on MINOP to set the minimum operating input voltage
level. The boost regulator starts switching when the CBP voltage exceeds the MINOP voltage. When
the MINOP pin is floating, the IC operates in no sensing mode with a fixed MPPT level. Connect this
pin through AGND to disable the MINOP function.
22
22
DIS_SW
Control Signal from Microcontroller or RF Transceiver to Stop Switching Boost Charger.
23
23
REG_D1
Regulated Output Working Mode Set D1. Enable LDO mode by pulling this pin high.
24
24
REG_D0
Regulated Output Working Mode Set D0. Enable boost mode by pulling this pin high.
EPAD
Exposed Pad. The exposed pad must be connected to AGND.
1
N/A means not applicable.



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