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ICS650-40 Fiches technique(PDF) 1 Page - Integrated Circuit Systems |
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ICS650-40 Fiches technique(HTML) 1 Page - Integrated Circuit Systems |
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1 / 6 page ![]() ICS650-40 MDS 650-40 C 1 Revision 060705 Integrat ed Circuit Systems ● 525 Race Stre et, San Jo se, CA 9 5126 ● te l (40 8 ) 2 97-12 01 ● www.ics t.co m ETHERNET SWITCH CLOCK SOURCE Description The ICS650-40 is a clock chip designed for use in Ethernet Switch applications. Using ICS’ patented Phase-Locked Loop (PLL) techniques, the device takes a 25 MHz crystal input and produces various output clock frequencies as listed in Output Select Table. Features • Packaged in 16-pin TSSOP • Available in Pb (lead) free package • Operating voltage of 3.3 V • Low power consumption • Input frequency of 25 MHz • Low long-term jitter • 2.5 V to 3.3 V clock outputs Block Diagram Phase Lock Loop Clock Buffer/ Crystal Oscillator VDD GND 3 4 X1/ICLK X2 25 MHz crystal or clock Control Logic OE S1:S0 CLKB 2 CLKA Optional tuning crystal capacitors VDDOA VDDOB |
Numéro de pièce similaire - ICS650-40 |
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Description similaire - ICS650-40 |
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