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ADP7118ACPZN-R7 Fiches technique(PDF) 20 Page - Analog Devices

No de pièce ADP7118ACPZN-R7
Description  20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator
PDF  24 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

ADP7118ACPZN-R7 Fiches technique(HTML) 20 Page - Analog Devices

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ADP7118
Data Sheet
Rev. F | Page 20 of 24
PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS
Heat dissipation from the package can be improved by increasing
the amount of copper attached to the pins of the ADP7118.
However, as listed in Table 6, a point of diminishing returns is
eventually reached, beyond which an increase in the copper size
does not yield significant heat dissipation benefits.
Place the input capacitor as close as possible to the VIN and
GND pins. Place the output capacitor as close as possible to the
VOUT and GND pins. Use of 0805 or 1206 size capacitors and
resistors achieves the smallest possible footprint solution on
boards where area is limited.
Figure 64. Example LFCSP PCB Layout
Figure 65. Example SOIC PCB Layout



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