RA4M3 datasheet(50/92 Pages) RENESAS

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Note:

tPcyc: PCLKA cycle.

Note:

Must use pins that have a letter appended to their name, for instance “_A”, “_B”, to indicate group membership. For the SPI

interface, the AC portion of the electrical characteristics is measured for each group.

Note 1. N is set to an integer from 1 to 8 by the SPCKD register.

Note 2. N is set to an integer from 1 to 8 by the SSLND register.

RSPCKn

master select

output

RSPCKn

slave select input

tSPCKWH

VOH

VOL

VOH

tSPCKWL

tSPCKr

tSPCKf

VOL

tSPcyc

tSPCKWH

VIH

VIL

VIH

tSPCKWL

tSPCKr

tSPCKf

VIL

tSPcyc

VOH = 0.7 × VCC, VOL = 0.3 × VCC, VIH = 0.7 × VCC, VIL = 0.3 × VCC

Note:

n = A

Figure 2.34

SPI clock timing

tDr, tDf

tSU

tLEAD

tTD

tLAG

tSSLr, tSSLf

tOH

tOD2

MSB IN

DATA

LSB IN

MSB IN

MSB OUT

DATA

LSB OUT

IDLE

MSB OUT

SSLn0 to

SSLn3

output

RSPCKn

CPOL = 0

output

RSPCKn

CPOL = 1

output

MISOn

input

MOSIn

output

SPI

tOD1

Note:

n = A

Figure 2.35

SPI timing for master when CPHA = 0

RA4M3 Datasheet

2. Electrical Characteristics

R01DS0368EJ0120 Rev.1.20

Dec 2, 2020

Page 50 of 92

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