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STSPIN32F0A Fiches technique(PDF) 25 Page - STMicroelectronics |
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STSPIN32F0A Fiches technique(HTML) 25 Page - STMicroelectronics |
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25 / 41 page ![]() STSPIN32F0A Device description DocID030766 Rev 2.0 25/41 Figure 10: Linear regulator output characteristics The linear regulator is designed to supply the internal circuitry only and must not be used to supply external components. 6.4 Standby mode The device is forced into the standby mode to reduce power consumption forcing both the OC_TH_STBY1 and OC_TH_STBY2 analog IC inputs low (see Table 12: "OC threshold values"). When the standby mode is set the analog IC is put into the low consumption mode after a tsleep time, in particular: • The linear regulator is switched off • All the output drivers are forced low (external power switches turned off) • Op amps and comparators disabled • The DC/DC regulator remains operative. When the device exits from the standby mode a set time is necessary to recover a proper value of the 12 V internal regulator. This set time is strictly dependent by the capacitor connected on the VREG12 pin and can be calculated with Equation 1. VM [V] VREG12 [V] t t 7.5 7.2 13 45 12 |
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