AS9C25512M2018L

AS9C25256M2018L

9/24/04, v.1.2

Alliance Semiconductor

P. 21 of 30

®

Snooze mode

Snooze mode is a low-current, power-down mode in which the corresponding port is deselected and its current is reduced to a

very low value. Both ports are equipped with independent SNOOZE inputs (ZZ). During Snooze mode, all inputs of the port

except ZZ are internally disabled and all its Outputs go to High-Z.

ZZ is an asynchronous, active HIGH input that causes the selected port to enter Snooze mode. If both ports go into Snooze mode,

Any READ or WRITE operation pending when the port enters Snooze mode is not guaranteed to complete. Therefore, Snooze

transitioning out of snooze mode, only DESELECT cycles should be given.

Snooze mode electrical characteristics

Notes:

2. CE is an internal signal. CE = H implies 'Chip is Deselected' (CE0 = H or CE1 =L), CE = L implies 'Chip is Selected' (CE0 = L and CE1 =H).

3. All timings are same for Port A and Port B.

4. Minimum of two deselect cycles should be given before asserting snooze and minimum of two deselect cycles should be given after de-asserting snooze to guarantee data

integrity.

5. Select cycles indicated before and after Snooze are Read cycles. They can also be Write cycles.

Description

Conditions

Symbol

Min

Max

Units

SNOOZE MODE Current

15

18

mA

ZZ active to input ignored

-

2

cycle

ZZ inactive to input sampled

2

-

cycle

ZZ active to enter Snooze Current

-

2

cycle

ZZ inactive to exit Snooze Current

0

-

cycle

CLK

Don’t care

IZZ

ZZ setup cycles

ZZ recovery cycles

High-Z

ZZ

INPUTS

(Except ZZ)

(Qout)

Undefined

Valid

Valid