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ST8500TR Fiches technique(PDF) 6 Page - STMicroelectronics |
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ST8500TR Fiches technique(HTML) 6 Page - STMicroelectronics |
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6 / 37 page ![]() Device architecture ST8500 6/37 DocID031029 Rev 3 Figure 2. ST8500 detailed architecture 2.1 Power line communication (PLC) subsystem The ST8500 device embeds a fully programmable power line communication subsystem, comprising the RTE, DFE and AFE. The AFE has been designed for a differential power line interface; however, the single- ended operation is possible for simpler hardware application development. The DC to 500 kHz signal bandwidth is supported, targeting a number of possible PLC solutions. |
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