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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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PCF2127AT Fiches technique(PDF) 80 Page - NXP Semiconductors |
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PCF2127AT Fiches technique(HTML) 80 Page - NXP Semiconductors |
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80 / 100 page  PCF2127 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 8 — 19 December 2014 80 of 100 NXP Semiconductors PCF2127 Accurate RTC with integrated quartz crystal for industrial applications 14. Dynamic characteristics 14.1 SPI-bus timing characteristics [1] No load value; bus is held up by bus capacitance; use RC time constant with application values. Table 92. SPI-bus characteristics VDD = 1.8 V to 4.2 V; VSS =0V; Tamb = 40 C to +85 C, unless otherwise specified. All timing values are valid within the operating supply voltage at ambient temperature and referenced to VIL and VIH with an input voltage swing of VSS to VDD (see Figure 55). Symbol Parameter Conditions VDD =1.8 V VDD =4.2 V Unit Min Max Min Max Pin SCL fclk(SCL) SCL clock frequency register read/write access - 2.0 - 6.5 MHz RAM write access - 2.0 - 6.5 MHz RAM read access - 1.11 - 6.25 MHz tSCL SCL time register read/write access 800 - 140 - ns RAM write access 800 - 140 - ns RAM read access 900 - 160 - ns tclk(H) clock HIGH time register read/write access 100 - 70 - ns RAM write access 100 - 70 - ns RAM read access 450 - 80 - ns tclk(L) clock LOW time register read/write access 400 - 70 - ns RAM write access 400 - 70 - ns RAM read access 450 - 80 - ns tr rise time for SCL signal - 100 - 100 ns tf fall time for SCL signal - 100 - 100 ns Pin SDA/CE tsu(CE_N) CE_N set-up time 60 - 30 - ns th(CE_N) CE_N hold time 40 - 25 - ns trec(CE_N) CE_N recovery time 100 - 30 - ns tw(CE_N) CE_N pulse width - 0.99 - 0.99 s Pin SDI tsu set-up time set-up time for SDI data 70 - 20 - ns th hold time hold time for SDI data 70 - 20 - ns Pin SDO td(R)SDO SDO read delay time CL = 50 pF register read access - 225 - 55 ns RAM read access - 410 - 55 ns tdis(SDO) SDO disable time [1] -90 -25 ns tt(SDI-SDO) transition time from SDI to SDO to avoid bus conflict 0 - 0 - ns |
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