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FXPS7115D4 Fiches technique(PDF) 49 Page - NXP Semiconductors

No de pièce FXPS7115D4
Description  Digital absolute pressure sensor, 40 kPa to 115 kPa
PDF  72 Pages
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXPS7115D4 Fiches technique(HTML) 49 Page - NXP Semiconductors

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NXP Semiconductors
FXPS7115D4
Digital absolute pressure sensor, 40 kPa to 115 kPa
FXPS7115D4
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2019. All rights reserved.
Product data sheet
Rev. 3 — 5 December 2019
49 / 72
7.7.23 DSP_CFG_F Register
The DSP configuration register is a factory programmable OTP register that contains
DSP-specific configuration information. This register is included in the factory
programmed OTP array error detection. This register is readable in SPI mode or I2C
mode when ENDINIT is not set.
Table 82. Range Indication Bits (RANGE[3:0])
RANGE[3]
RANGE[2]
RANGE[1]
RANGE[0]
Absolute Pressure Range (kPa)
0
0
0
0
Rated Pressure Range
0
0
0
1
reserved
0
0
1
0
reserved
0
0
1
1
reserved
0
1
0
0
reserved
0
1
0
1
reserved
0
1
1
0
reserved
0
1
1
1
reserved
1
0
0
0
reserved
1
0
0
1
reserved
1
0
1
0
reserved
1
0
1
1
reserved
1
1
0
0
reserved
1
1
0
1
reserved
1
1
1
0
reserved
1
1
1
1
reserved
7.7.24 IC type register (Address C0h)
The IC type register is a factory programmable OTP register that contains the IC type
as defined below. This register is included in the factory programmed OTP array error
detection. This register is readable in SPI mode or I2C mode when ENDINIT is not set.
Table 83. IC TYPE REGISTER (ICTYPEID address C0h) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
ICTYPEID[7:0]
Reset
0
0
0
0
0
0
1
0
Access
R
R
R
R
R
R
R
R
7.7.25 IC manufacturer revision register (Address C1h)
The IC manufacturer revision register is a factory programmable OTP register that
contains the IC revision. The upper nibble contains the main IC revision. The lower nibble
contains the sub IC revision. This register is included in the factory programmed OTP
array error detection. This register is readable in SPI mode or I2C mode when ENDINIT is
not set.
Table 84. IC MANUFACTURER REVISION REGISTER (ICREVID address C1h) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
ICREVID[7:0]
Reset
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Access
R
R
R
R
R
R
R
R



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