STM32MP151D datasheet(24/253 Pages) STMICROELECTRONICS

24 / 253 page

Functional overview

STM32MP151A/D

24/253

DS12500 Rev 3

3.4

DDR3/DDR3L/LPDDR2/LPDDR3 controller (DDRCTRL)

DDRCTRL combined with DDRPHYC provides a complete memory interface solution for

DDR memory subsystem.

•

Two 64-bit AMBA 4 AXI4 ports interface (XPI)

•

AXI clock asynchronous to the controller

•

Supported standards:

–

JEDEC DDR3 SDRAM specification, JESD79-3E for DDR3/3L with 32-bit

interface

–

JEDEC LPDDR2 SDRAM specification, JESD209-2E for LPDDR2 with 32-bit

interface

–

JEDEC LPDDR3 SDRAM specification, JESD209-3B for LPDDR3 with 32-bit

interface

•

Advanced scheduler and SDRAM command generator

•

Programmable full data width (32-bit) or half data width (16-bit)

•

Advanced QoS support with 3 traffic class on read and 2 traffic classes on write

•

Options to avoid starvation of lower priority traffic

•

Guaranteed coherency for write-after-read (WAR) and read-after-write (RAW) on AXI

ports

•

Programmable support for burst length options (4, 8,16)

•

Write combine to allow multiple writes to the same address to be combined into a

single write

•

Single rank configuration

•

Supports automatic SDRAM power-down entry and exit caused by lack of transaction

arrival for programmable time

•

Supports automatic clock stop (LPDDR2/3) entry and exit caused by lack of transaction

arrival

•

Supports automatic low power mode operation caused by lack of transaction arrival for

programmable time via hardware low power interface

•

Programmable paging policy

•

Supports automatic or under software control self-refresh entry and exit

•

Support for deep power-down entry and exit under software control (LPDDR2)

•

Support for explicit SDRAM mode register updates under software control

•

Flexible address mapper logic to allow application specific mapping of row, column,

bank bits

•

User-selectable refresh control options

•

DDRPERFM associated block to help for performance monitoring and tuning

DDRCTRL and DDRPHYC can be defined (in ETZPC) as accessible by secure software

only.

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