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STM32MP151D Fiches technique(PDF) 50 Page - STMicroelectronics

No de pièce STM32MP151D
Description  Arm® Cortex®-A7 800 MHz Cortex®-M4 MPU, TFT, 35 comm. interfaces, 25 timers, adv. analog
PDF  253 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32MP151D Fiches technique(HTML) 50 Page - STMicroelectronics

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Functional overview
STM32MP151A/D
50/253
DS12500 Rev 3
All USART have a clock domain independent from the CPU clock, allowing the USARTx to
wake up the STM32MP151A/D from Stop mode using baudrates up to 200 Kbaud.The wake
up events from Stop mode are programmable and can be:
Start bit detection
Any received data frame
A specific programmed data frame
All USART interfaces can be served by the DMA controller.
USART1 can be defined (in ETZPC) as accessible by secure software only.
3.39
Serial peripheral interface (SPI1, SPI2, SPI3, SPI4, SPI5,
SPI6)– inter- integrated sound interfaces (I2S1, I2S2, I2S3)
The devices feature up to six SPIs (SPI2S1, SPI2S2, SPI2S3, SPI4, SPI5 and SPI6) that
allow communication at up to 50 Mbit/s in master and slave modes, in half-duplex, full-
duplex and simplex modes. The 3-bit prescaler gives 8 master mode frequencies and the
frame is configurable from 4 to 16 bits. All SPI interfaces support NSS pulse mode, TI mode,
hardware CRC calculation and 8x 8-bit embedded Rx and Tx FIFOs with DMA capability.
Three standard I2S interfaces (I2S1, I2S2, I2S3, multiplexed with SPI1, SPI2 and SPI3) are
available. They can be operated in master or slave mode, in full-duplex and half-duplex
communication modes, and can be configured to operate with a 16-/32-bit resolution as an
input or output channel. Audio sampling frequencies from 8 kHz up to 192 kHz are
supported. When either or both of the I2S interfaces is/are configured in master mode, the
master clock can be output to the external DAC/CODEC at 256 times the sampling
Table 5. USART features
USART modes/features(1)
1. X = supported.
USART1/2/3/6
UART4/5/7/8
Hardware flow control for modem
X
X
Continuous communication using DMA
X
X
Multiprocessor communication
X
X
Synchronous mode (master/slave)
X
-
Smartcard mode
X
-
Single-wire half-duplex communication
X
X
IrDA SIR ENDEC block
X
X
LIN mode
X
X
Dual clock domain and wakeup from low power mode
X
X
Receiver timeout interrupt
X
X
Modbus communication
X
X
Auto baud rate detection
X
X
Driver Enable
X
X
USART data length
7, 8 and 9 bits



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