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AX58200BT Fiches technique(PDF) 41 Page - ASIX Electronics Corporation |
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AX58200BT Fiches technique(HTML) 41 Page - ASIX Electronics Corporation |
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41 / 180 page ![]() 41 Copyright © 2019 ASIX Electronics Corporation. All rights reserved. AX58200 EtherCAT Slave Controller SoC 2.2.3 System Power Distribution In this chip, power distribution is divided into four segments: ⚫ Analog power from AVDD and AVSS provides the power for analog components operation. ⚫ Digital power from VDD and VSS supplies the power to the internal regulator which provides a fixed 1.8 V power for digital operation and I/O pins. ⚫ USB transceiver power from VBUS offers the power for operating the USB transceiver. ⚫ RTC power from VDD provides the power for RTC and 80 bytes backup registers. The outputs of internal voltage regulators, LDO and VDD33, require an external capacitor which should be located close to the corresponding pin. Analog power (AVDD) should be the same voltage level of the digital power (VDD). Figure 2.2-6 shows the AX58200 power distribution. Figure 2.2-6: Power Distribution Diagram |
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