DSC1102 datasheet(2/28 Pages) MICROCHIP

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DSC1102/22

DS20006254A-page 2

 2019 Microchip Technology Inc.

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ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings †

Supply Voltage .......................................................................................................................................... –0.3V to +4.0V

Input Voltage .................................................................................................................................... –0.3V to VDD + 0.3V

ESD Protection (HBM) ...............................................................................................................................................4 kV

ESD Protection (MM) ............................................................................................................................................... 400V

ESD Protection (CDM) ............................................................................................................................................1.5 kV

† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.

This is a stress rating only and functional operation of the device at those or any other conditions above those indicated

in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended

periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

Specifications: VDD = 3.3V; TA = +25°C unless otherwise specified.

Parameters

Sym.

Min.

Typ.

Max.

Units

Conditions

Supply Voltage (Note 1)

VDD

2.25

—

3.63

—

Supply Current

IDD

—

0.095

DSC1102, EN pin low,

Output is disabled

—

DSC1122, EN pin low,

Output is disabled

Frequency Stability

Δf

—

±10

ppm

Includes frequency variation

due to initial tolerance,

temp., and power supply

voltage.

—

±20

—

±25

—

±50

Aging - First Year

ΔfY1

—

±5

ppm

One year at +25°C

Aging - After First Year

ΔfY2+

—

<±1

ppm/yr

Year two and beyond at

+25°C

Start-up Time (Note 2)

tSU

—

T = +25°C

Input Logic Levels

VIH

0.75 x VDD

—

Input logic high

VIL

—

0.25 x VDD

Input logic low

Output Disable Time (Note 3)

tDA

—

Output Enable Time

tEN

—

DSC1102

—

DSC1122

Enable Pull-Up Resistor

(Note 4)

RPU

—

kΩ

Pull-up resistor exists

LVPECL Outputs

Supply Current

IDD

—

56.5

Output Enabled, RL = 50Ω

Output Logic Levels

VOH

VDD – 1.08

—

Output logic high, RL = 50Ω

VOL

—

VDD – 1.55

Output logic low

Peak-to-Peak Output Swing

—

800

—

Single-Ended

Note 1: Pin 6 VDD should be filtered with a 0.1 μF capacitor.

2: tSU is time to 100 ppm stable output frequency after VDD is applied and outputs are enabled.

3: Output Waveform and Test Circuit figures below define the parameters.

4: Output is enabled if pad is floated or not connected.

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