STM32MP157A datasheet(49/258 Pages) STMICROELECTRONICS

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DS12504 Rev 2

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STM32MP157A

Functional overview

3.35.8

Generic timers (Cortex-A7 CNT)

Cortex-A7 generic timers embedded inside Cortex-A7 are fed by value from system timing

generation (STGEN).

The Cortex-A7 processor provides a set of four timers for each processor:

•

Physical timer for use in secure and non-secure modes. The registers for the physical

timer are banked to provide secure and non-secure copies.

•

Virtual timer for use in non-secure modes.

•

Physical timer for use in hypervisor mode.

Generic timers are not memory mapped peripherals, they are accessible only by specific

Cortex-A7 coprocessor instructions (cp15).

3.36

System timer generation (STGEN)

The system timing generation (STGEN) generates a time count value that provides a

consistent view of time for all Cortex-A7 generic timers.

The system timing generation has the following key features:

•

64-bit wide to avoid roll-over issues.

•

Starts from zero or a programmable value.

•

A control APB interface (STGENC) enables the timer to be saved and restored across

powerdown events.

•

Read-only APB interface (STGENR) enables the timer value to be read by non-secure

software and debug tools.

•

The timer value incrementing can be stopped during system debug.

STGENC can be defined (in ETZPC) as accessible by secure software only.

3.37

Real-time clock (RTC)

The RTC provides an automatic wakeup to manage all low-power modes.

The real-time clock (RTC) is an independent BCD timer/counter. The RTC provides a time-

of-day clock/calendar with programmable alarm interrupts.

The RTC includes also a periodic programmable wakeup flag with interrupt capability.

Two 32-bit registers contain the seconds, minutes, hours (12- or 24-hour format), day (day

of week), date (day of month), month, and year, expressed in binary coded decimal format

(BCD). The sub-seconds value is also available in binary format.

Compensations for 28-, 29- (leap year), 30-, and 31-day months are performed

automatically. Daylight saving time compensation can also be performed.

Additional 32-bit registers contain the programmable alarm subseconds, seconds, minutes,

hours, day, and date.

A digital calibration feature is available to compensate for any deviation in crystal oscillator

accuracy.

After backup domain reset, all RTC registers are protected against possible parasitic write

accesses.

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