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STR720 Fiches technique(PDF) 313 Page - STMicroelectronics |
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STR720 Fiches technique(HTML) 313 Page - STMicroelectronics |
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313 / 401 page ![]() STR720 - EXTENDED FUNCTION TIMER (EFT) 313/401 According to particular device implementation, the external clock can be available on a general purpose I/O pin as alternate function, this allows the Timer to count events independently by the system clock (which could be prescaled or multiplied according to the different run and low-power modes), generating regular time basis. 21.3.3 Input Capture In this section, the index “i”, may be A or B. The two input capture 16-bit registers (ICAR and ICBR) are used to latch the value of the counter after a transition detected by the ICAPi pin (see Figure 47). ICiR register are read-only registers. The active transition is software programmable through the IEDGi bit of the Control Register (CR1). Timing resolution is one/two count of the counter: (fAPB/(CC7÷CC0+1)). Figure 46. Counter Timing Diagram, internal clock divided by n APB_CLK INTERNAL RESET TIMER STROBE COUNTER REGISTER OVERFLOW FLAG TOF FFFC FFFD 0000 1 |
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