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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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STR720 Fiches technique(PDF) 93 Page - STMicroelectronics |
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STR720 Fiches technique(HTML) 93 Page - STMicroelectronics |
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93 / 401 page  STR720 - DMA CONTROLLER (DMAC) 93/401 Current Destination address high X (DMADeCurrHiX) (X=2,3) Address Offset: A0h - E0h Reset value: 0000h DMADeCurrHiX holds the current value of the high destination address pointer related to stream X. This register is read only. Bit 15:0 = DMADeCurrHiX[15:0] Current Destination address low X (DMADeCurrLoX) (X=2,3) Address Offset: 24h - 64h - A4h - E4h Reset value: 0000h DMADeCurrLoX holds the current value of the low destination address pointer related to stream X. This register is read only. Bit 15:0 = DMADeCurrLoX[15:0] The value in the registers (DMADeCurrLo and DMADeCurrHi) is used as an AHB address in a DMA to destination data transfer over the AHB bus. If the DeInc bit in the Control Register is set to ‘1’, the value in the Current Destination Registers will be incremented as data are transferred from DMA to destination. The value will be incremented at the end of the address phase of the AHB bus transfer by the transferred size value. If DeInc bit is ‘0’, the Current Destination Register will hold a same value during the whole DMA data transfer. 15 14 13 12 11 10 9 8 765432 1 0 DMADeCurrHiX r 15 14 13 12 11 10 9 8 765432 1 0 DMADeCurrLoX r 1 |
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