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HY27SF161G2M-VIP Fiches technique(PDF) 47 Page - Hynix Semiconductor |
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HY27SF161G2M-VIP Fiches technique(HTML) 47 Page - Hynix Semiconductor |
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47 / 48 page ![]() Rev 0.7 / Apr. 2005 47 Preliminary HY27UF(08/16)1G2M Series HY27SF(08/16)1G2M Series 1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Application Note 1. Power-on/off Sequence After power is on, the device starts an internal circuit initialization when the power supply voltage reaches a specific level. The device shows its internal initialization status with the Ready/Busy signal if initialization is on progress. While the device is initializing, the device sets internal registeries to default value and generates internal biases to operate circuits. Typically the initializing time of 20us is required. Power-off or power failure before write/erase operation is complete will cause a loss of data. The WP# signal helps user to protect not only the data integrity but also device circuitry from being damaged at power-on/off by keeping WP# at VIL during power-on/off. For the device to operate stably, it is highly recommended to operate the device as shown Fig.33. Figure 34: Power-on/off sequence |
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