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AW9110BTQR Fiches technique(PDF) 8 Page - Shanghai awinic technology co.,ltd |
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AW9110BTQR Fiches technique(HTML) 8 Page - Shanghai awinic technology co.,ltd |
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8 / 33 page ![]() AW9110B May. 2018 V1.2 www.awinic.com.cn 8 Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD 8 I2C INTERFACE TIMING Parameter Symbol MIN TYP MAX UNIT Interface Clock frequency fSCL 400 kHz (Repeat-start) Start condition hold time tHD:STA 0.6 μs Low level width of SCL tLOW 1.3 μs High level width of SCL tHIGH 0.6 μs (Repeat-start) Start condition setup time tSU:STA 0.6 μs Data hold time tHD:DAT 0 μs Data setup time tSU:DAT 0.1 μs Rising time of SDA and SCL tR 0.3 μs Falling time of SDA and SCL tF 0.3 μs Stop condition setup time tSU:STO 0.6 μs Time between start and stop condition tBUF 1.3 Maximum width noise input filter out(burr) tSP 0 50 ns Capacitor of the bus Cb 400 pF SDA SCL tBUF tLOW tHD:STA tHD:DAT tR tHIGH tF tSU:DAT tSP tSU:STO VIH VIL Stop Stop Start Start VIH VIL tSU:STA |
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