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MP6537 Fiches technique(PDF) 4 Page - Monolithic Power Systems |
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MP6537 Fiches technique(HTML) 4 Page - Monolithic Power Systems |
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4 / 14 page ![]() MP6537 – 100V, THREE-PHASE, BLDC MOTOR PRE-DRIVER WITH PWM & ENABLE INPUTS MP6537 Rev. 1.01 www.MonolithicPower.com 4 4/20/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. ELECTRICAL CHARACTERISTICS VIN =48V, VREG =12V, TA = 25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units Power Supply Input supply voltage VIN 8 100 V LDO output voltage VLDO ILDO ≤ 5mA, VIN > 15V 10.8 12 13.2 V Gate driver supply voltage VREG 8.5 14 V Quiescent current I Q nSLEEP = 1, not switching 0.7 mA I SLEEP nSLEEP = 0 1 µA Control Logic Input logic ‘low’ threshold VIL 0.8 V Input logic ‘high’ threshold VIH 2 V Logic input current IIN(H) VIH = 0.8V -2.4 2.4 µA IIN(L) VIL = 5V -14 14 µA nSLEEP pull down resistance RSLEEP-PD 450 k Ω Internal pull down resistance R PD 450 k Ω Fault Output (Open-Drain Output) Output low voltage VOL IO = 5mA 0.1 V Output high leakage current IOH VO = 3.3V 1 µA Protection Circuit VREG UVLO rising threshold V REG_RUVLO 6.5 7.5 8.5 V VREG UVLO falling threshold V REG_FUVLO 6 6.8 7.6 V VREG UVLO hysteresis V REG_HYS 610 mV VIN UVLO rising threshold V VIN_RUVLO 3.6 4 4.4 V VIN UVLO falling threshold V VIN_FUVLO 3.4 3.8 4.3 V VIN UVLO hysteresis V VIN_HYS 100 mV VBST UVLO threshold V BST_UVLO Voltage between SHx and BSTx 4 V OCREF threshold VOC VOC = 1V 0.8 1 1.2 V VOC = 2.4V 2.18 2.4 2.62 V OCP deglitch time tOC 2.7 µs Sleep wakeup time tSLEEP 2 ms Thermal shutdown TTSD (5) 175 °C Thermal shutdown hysteresis TTSD_HYS (5) 20 °C Gate Drive Bootstrap diode forward voltage VFBOOT ID = 10mA 1.2 V ID = 50mA 2.3 V Maximum source current DSO (5) 0.8 A Maximum sink current DSI (5) 1 A Gate drive pull up resistance RUP VDS = 1V 7 Ω HS gate drive pull down resistance RHS-DN VDS = 1V 0.6 4.5 Ω LS gate drive pull down resistance RLS-DN VDS = 1V 0.6 4.5 Ω LS automatic turn on time tLS 4.6 µs Dead time tDEAD RDT = 10kΩ 560 ns RDT = 100kΩ 4.5 µs DT tied to GND 77 ns NOTE: 5) Guaranteed by design. |
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