WM8591 datasheet(39/50 Pages) WOLFSON

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WM8591

PP Rev 1.0 May 2005

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

DEEMPH

De-emphasis Mode Select:

0 : Normal mode

1: De-emphasis mode

DZFM

ZFLAG1

ZFLAG2

2:1

DZFM

Disabled

Left channels zero

Both channels zero

Either channel zero

Disabled

Right channels zero

Both channels zero

Either channel zero

DMUTE

DAC Channel Soft Mute Enables:

0: Mute disabled

1: Mute enabled

ZFLAG polarity

ZFLAGPOL

ZFLAGL

ZFLAGR

Pin pulls low to indicate zero condition, high

impedance otherwise

R9 (09h)

0001001

DAC Control

ZFLAGPOL

Pin is high impedance when zero condition

detected, pulls low otherwise

1:0

DACFMT[1:0]

DAC Interface Format Select:

00: Right justified mode

01: Left justified mode

10: I

2S mode

11: DSP mode

DACLRC Polarity or DSP Early/Late Mode Select

DACLRP

Left Justified / Right Justified /

2S:

0: Standard DACLRC Polarity

1: Inverted DACLRC Polarity

DSP Mode:

0: Early Mode

1: Late Mode

DACBCP

DAC BITCLK Polarity:

0: Normal – DIN and DACLRC sampled on rising edge of

DACBCLK

1: Inverted - DIN and DACLRC sampled on falling edge of

DACBCLK

5:4

DACWL[1:0]

DAC Input Word Length:

00: 16-bit Mode

01: 20-bit Mode

10: 24-bit Mode

11: 32-bit Mode (not supported in right justified mode)

R10 (0Ah)

0001010

DAC Interface

Control

DACOSR

DAC Oversample Rate Select:

0: 128x oversampling

1: 64x oversapmling

1:0

ADCFMT[1:0]

ADC Interface Format Select:

00: Right justified mode

01: Left justified mode

10: I

2S mode

11: DSP mode

ADCLRC Polarity or DSP Early/Late Mode Select

R11 (0Bh)

0001011

ADC Interface

Control

ADCLRP

Left Justified / Right Justified /

2S:

0: Standard ADCLRC polarity

1: Inverted ADCLRC polarity

DSP Mode:

0: Early mode

1: Late mode

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