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LT6230 Fiches technique(PDF) 12 Page - Linear Technology

No de pièce LT6230
Description  12-Bit, 500ksps Serial Sampling ADC in TSOT
PDF  22 Pages
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Fabricant  LINER [Linear Technology]
Site Internet  http://www.linear.com
Logo LINER - Linear Technology

LT6230 Fiches technique(HTML) 12 Page - Linear Technology

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LTC2312-12
12
231212fa
For more information www.linear.com/LTC2312-12
applicaTions inForMaTion
Exiting Nap/Sleep Mode
Waking up the LTC2312-12 from either nap or sleep
mode, as shown in Figures 8 and 9, requires SCK to be
pulsed one time. A conversion cycle (tACQ) may be started
immediately following nap mode as shown in Figure 8. A
period of time allowing the reference voltage to recover
mustfollowwakingupfromsleepmodeasshowninFigure
9. The wait period required before initiating a conversion
for the recommended value of CREF of 2.2µF is 1.1ms.
Power Supply Sequencing
The LTC2312-12 does not have any specific power sup-
ply sequencing requirements. Care should be taken to
observe the maximum voltage relationships described in
the Absolute Maximum Ratings section.
Single-Ended Analog Input Drive
The analog input of the LTC2312-12 is easy to drive. The
input draws only one small current spike while charging
the sample-and-hold capacitor following the falling edge
of CONV. During the conversion, the analog input draws
only a small leakage current. If the source impedance of
the driving circuit is low, then the input of the LTC2312-12
can be driven directly. As the source impedance increases,
so will the acquisition time. For minimum acquisition time
Figure 8. LTC2312-12 Entering/Exiting Nap Mode
Figure 9. LTC2312-12 Entering/Exiting Sleep Mode
with high source impedance, a buffer amplifier should be
used. The main requirement is that the amplifier driving
the analog input must settle after the small current spike
before the next conversion starts. Settling time must be
less than tACQ-MIN (600ns) for full performance at the
maximumthroughputrate.Whilechoosinganinputampli-
fier, also keep in mind the amount of noise and harmonic
distortion the amplifier contributes.
Choosing an Input Amplifier
Choosing an input amplifier is easy if a few requirements
are taken into consideration. First, to limit the magnitude
of the voltage spike seen by the amplifier from charging
the sampling capacitor, choose an amplifier that has a low
output impedance (<50Ω) at the closed-loop bandwidth
frequency. For example, if an amplifier is used in a gain
of 1 and has a unity-gain bandwidth of 50MHz, then the
output impedance at 50MHz must be less than 50Ω. The
second requirement is that the closed-loop bandwidth
must be greater than 50MHz to ensure adequate small
signal settling for full throughput rate. If slower op amps
are used, more time for settling can be provided by in-
creasing the time between conversions. The best choice
for an op amp to drive the LTC2312-12 will depend on the
application.Generally,applicationsfallintotwocategories:
AC applications where dynamic specifications are most
CONV
SCK
1
2
Z
Z
SDO
HI-Z STATE
231212 F08
NAP MODE
HOLD STATIC HIGH or LOW
START tACQ
tACQ-MIN
START tCONV
CONV
SCK
1
2
Z
Z
3
4
SDO
HI-Z STATE
231212 F09
NAP MODE
SLEEP MODE
HOLD STATIC HIGH or LOW
START tCONV
VREF RECOVERY
tWAIT



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