Description

This circuit is controlled by the signals word select and clock. When the word select input is taken low word 1 (A1, B1, C1 and D 1) is presented to the inputs of the flip-flops, and when word select is high word 2 (A2, B 2, C2 and D2) is presented to the inputs of the flip-flops. The selected word is clocked to the output terminals on the negative edge of the clock pulse.

Features

• High Speed Operation: tpd (Clock to Q) = 19 ns typ (CL = 50 pF)

• High Output Current: Fanout of 10 LSTTL Loads

• Wide Operating Voltage: VCC = 2 to 6 V

• Low Input Current: 1 µA max

• Low Quiescent Supply Current: ICC (static) = 4 µA max