| Fabricant | No de pièce | Fiches technique | Description |
National Semiconductor ... | 54LS10M | 
120Kb/6P | Triple 3-Input NAND Gates |
National Semiconductor ... | 54LS109 |
135Kb/ 6P | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs |
| 54LS109J |
135Kb/ 6P | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs |
| 54LS109M |
135Kb/ 6P | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs |
| 54LS109N |
135Kb/ 6P | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs |
| 54LS10E |
120Kb/ 6P | Triple 3-Input NAND Gates |
| 54LS10J |
120Kb/ 6P | Triple 3-Input NAND Gates |
| 54LS10N |
120Kb/ 6P | Triple 3-Input NAND Gates |
| 54LS10W |
120Kb/ 6P | Triple 3-Input NAND Gates |
| 54LS10 |
120Kb/ 6P | Triple 3-Input NAND Gates |
| 54LS11 |
120Kb/ 6P | Triple 3-Input AND Gates |
National Semiconductor ... | 54LS112 |
102Kb/ 3P | DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET, CLEAR, AND COMPLEMENTARY OUTPUTS |
| 54LS112DMQB |
102Kb/ 3P | DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET, CLEAR, AND COMPLEMENTARY OUTPUTS |
| 54LS112FMQB |
102Kb/ 3P | DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET, CLEAR, AND COMPLEMENTARY OUTPUTS |
| 54LS112LMQB |
102Kb/ 3P | DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET, CLEAR, AND COMPLEMENTARY OUTPUTS |
| 54LS113 |
98Kb/ 6P | Dual JK Edge-Triggered Flip-Flop |
| 54LS113DMQB |
98Kb/ 6P | Dual JK Edge-Triggered Flip-Flop |
| 54LS113FMQB |
98Kb/ 6P | Dual JK Edge-Triggered Flip-Flop |
| 54LS113LMQB |
98Kb/ 6P | Dual JK Edge-Triggered Flip-Flop |
| 54LS114 |
118Kb/ 6P | Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears |
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