AD9856AST datasheet(5/37 Pages) AD

5 / 37 page

AD9856

Rev. C | Page 4 of 36

Parameter

Temp

Test Level

Min

Typ

Max

Unit

TIMING CHARACTERISTICS

Serial Control Bus

Maximum Frequency

Full

MHz

Minimum Clock Pulse Width High (tPWH)

Full

Minimum Clock Pulse Width Low (tPWL)

Full

Maximum Clock Rise/Fall Time

Full

Minimum Data Setup Time (tDS)

Full

Minimum Data Hold Time (tDH)

Full

Maximum Data Valid Time (tDV)

Full

Wake-Up Time2

Full

Minimum RESET Pulse Width High (tRH)

Full

REFCLK cycles

CMOS LOGIC INPUTS

Logic 1 Voltage

25°C

2.6

Logic 0 Voltage

25°C

0.4

Logic 1 Current

25°C

µA

Logic 0 Current

25°C

µA

Input Capacitance

25°C

CMOS LOGIC OUTPUTS (1 mA LOAD)

Logic 1 Voltage

25°C

2.7

Logic 0 Voltage

25°C

0.4

POWER SUPPLY

+VS Current

Full Operating Conditions3

25°C

530

Burst Operation (25%)

25°C

450

Single-Tone Mode

25°C

495

160 MHz Clock

25°C

445

120 MHz Clock

25°C

345

Power-Down Mode

25°C

2 Assuming 1.3 kΩ and 0.01 µF loop filter components.

3 Assuming 1.3 kW and 0.01 mF loop filter components.

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