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AT746 Fiches technique(PDF) 1 Page - Power Semiconductors

No de pièce AT746
Description  PHASE CONTROL THYRISTOR
PDF  4 Pages
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Fabricant  POSEICO [Power Semiconductors]
Site Internet  http://www.poseico.com
Logo POSEICO - Power Semiconductors

AT746 Fiches technique(HTML) 1 Page - Power Semiconductors

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PHASE CONTROL THYRISTOR
AT746
Repetitive voltage up to
2600 V
Mean forward current
1794 A
Surge current
25 kA
FINAL SPECIFICATION
Feb. 17 - Issue: 1
Symbol
Characteristic
Conditions
Tj
[°C]
Value
Unit
BLOCKING
V RRM
Repetitive peak reverse voltage
125
2600
V
V RSM
Non-repetitive peak reverse voltage
125
2700
V
V DRM
Repetitive peak off-state voltage
125
2600
V
I RRM
Repetitive peak reverse current
V=VRRM
125
100
mA
I DRM
Repetitive peak off-state current
V=VDRM
125
100
mA
CONDUCTING
I T (AV)
Mean forward current
180° sin, 50 Hz, Th=55°C, double side cooled
1794
A
I T (AV)
Mean forward current
180° sin, 50 Hz, Tc=85°C, double side cooled
1404
A
I TSM
Surge forward current
Sine wave, 10 ms
125
25
kA
I² t
I² t
without reverse voltage
3125 x 10
3
A²s
V T
On-state voltage
On-state current =
5600 A
25
2,80
V
V T(TO)
Threshold voltage
125
1,10
V
r T
On-state slope resistance
125
0,270
mohm
SWITCHING
di/dt
Critical rate of rise of on-state current, min.
From 75% VDRM up to 1800 A; gate 10V, 5
W
125
200
A/µs
dv/dt
Critical rate of rise of off-state voltage, min.
Linear ramp up to 70% of VDRM
125
500
V/µs
t d
Gate controlled delay time, typical
VD=100V; gate source 25V, 10
W , tr=.5 µs
25
1
µs
t q
Circuit commutated turn-off time, typical
dv/dt = 20 V/µs linear up to 75% VDRM
350
µs
Q rr
Reverse recovery charge
di/dt = -20 A/µs, I= 1500 A
125
µC
I rr
Peak reverse recovery current
VR= 50 V
A
I H
Holding current, typical
VD=5V, gate open circuit
25
500
mA
I L
Latching current, typical
VD=5V, tp=30µs
25
2
mA
GATE
V GT
Gate trigger voltage
VD=5V
25
3,50
V
I GT
Gate trigger current
VD=5V
25
300
mA
V GD
Non-trigger gate voltage, min.
VD=VDRM
125
0,25
V
V FGM
Peak gate voltage (forward)
30
V
I FGM
Peak gate current
10
A
V RGM
Peak gate voltage (reverse)
5
V
P GM
Peak gate power dissipation
Pulse width 100 µs
150
W
P G
Average gate power dissipation
2
W
MOUNTING
R th(j-h)
Thermal impedance, DC
Junction to heatsink, double side cooled
17,0
°C/kW
R th(c-h)
Thermal impedance
Case to heatsink, double side cooled
3,0
°C/kW
T j
Operating junction temperature
-30 / 125
°C
F
Mounting force
40,0 / 50,0
kN
Mass
1000
g
ORDERING INFORMATION : AT746 S 26
standard specification
VRRM/100
POSEICO SPA
Via Pillea 42-44, 16153 Genova - ITALY
Tel. + 39 010 8599400 - Fax + 39 010 8682006
Sales Office:
Tel. + 39 010 8599400 - sales@poseico.com


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