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AT40K Fiches technique(PDF) 5 Page - ATMEL Corporation |
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AT40K Fiches technique(HTML) 5 Page - ATMEL Corporation |
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5 / 67 page ![]() 5 AT40K/AT40KLV Series FPGA 0896C–FPGA–04/02 Figure 2. Floor Plan (Representative Portion) (1) Note: 1. Repeaters regenerate signals and can connect any bus to any other bus (all path- ways are legal) on the same plane. Each repeater has connections to two adjacent local-bus segments and two express-bus segments. This is done automatically using the integrated development system (IDS) tool. RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RH RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RV RH = Vertical Repeater = Horizontal Repeater = Core Cell RAM RAM RAM RAM RAM RAM RAM RAM RAM RAM RAM RAM RAM RAM RAM RAM |
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