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74LVC2G240DP Fiches technique(PDF) 9 Page - NXP Semiconductors |
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74LVC2G240DP Fiches technique(HTML) 9 Page - NXP Semiconductors |
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9 / 20 page ![]() 2003 Mar 11 9 Philips Semiconductors Product specification Dual buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state 74LVC2G240 AC WAVEFORMS handbook, halfpage MNA960 tPLH tPHL VM VM VM VM nY output nA input VI GND VOH VOL Fig.4 The input (nA) to output (nY) propagation delays and the output transition times. VOL and VOH are typical output voltage drop that occur with the output load. VCC VM INPUT VI tr =tf 1.65 to 1.95 V 0.5 × VCC VCC ≤ 2.0 ns 2.3 to 2.7 V 0.5 × V CC VCC ≤ 2.0 ns 2.7 V 1.5 V 2.7 V ≤ 2.5 ns 3.0 to 3.6 V 1.5 V 2.7 V ≤ 2.5 ns 4.5 to 5.5 V 0.5 × V CC VCC ≤ 2.5 ns |
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