AD9286BCPZ-500 datasheet(19/28 Pages) AD

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AD9286

Data Sheet

The magnitude of the offset spur (OS) is shown in Equation 6.

OSOFFSET (dBFS) = 20 × log(OFFSET × 2/2RESOLUTION)

(6)

where:

OFFSET is the channel-to-channel offset in codes.

RESOLUTION is the resolution of the converter (eight bits).

OSOFFSET, as a function of offset mismatch, is shown in Figure 32.

2.5

2.0

1.5

1.0

0.5

OFFSET MISMATCH (% FS)

Figure 32. OSOFFSET as a Function of Offset Mismatch

Due to the orthogonal relationship between the gain and timing

errors, it is impossible to correct for one with the other. To mini-

mize channel-to-channel gain error, the AD9286 is designed

to have very close gain matching between the two channels.

Address 0x37 and Address 0x38 of the SPI provide the ability to

add delay to either clock path to realize a minimum clock skew

error. Also provided via the SPI, in Address 0x10, is the ability

to minimize the channel-to-channel offset error.

DIGITAL OUTPUTS

Digital Output Enable Function (OE)

The AD9286 has a flexible three-state ability for the digital output

pins. The three-state mode is enabled using the OE pin. When OE

is set to logic level high, the output drivers for both data buses

are placed into a high impedance state.

Rev. C | Page 18 of 27

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