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STR710FZ2 Fiches technique(PDF) 30 Page - STMicroelectronics |
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STR710FZ2 Fiches technique(HTML) 30 Page - STMicroelectronics |
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30 / 80 page ![]() System architecture STR71xFxx STR710RZ 30/80 Doc ID 10350 Rev 13 3.6 I/O port configuration Legend: AIN: Analog Input CMOS: CMOS Input levels IPUPD: Input Pull Up /Pull Down TTL: TTL Input levels N.A.: not applicable. In Output mode, a read access to the port gets the output latch value. Table 6. Port bit configuration table Configuration mode Input buffer PxD register PxC2 register PxC1 register PxC0 register Read access Write access INPUT TTL Input Floating TTL floating I/O pin don’t care 0 0 1 CMOS Input Floating CMOS floating I/O pin don’t care 0 1 0 CMOS Input Pull-Down (IPUPD) CMOS Pull- Down I/O pin 0 0 1 1 CMOS Input Pull-Up (IPUPD) CMOS Pull-Up I/O pin 1 0 1 1 Analog input AIN 0 don’t care 0 0 0 OUTPUT Output Open-Drain N.A. I/O pin 0 or 1 1 0 0 Output Push-Pull N.A. last value written 0 or 1 1 0 1 Alternate Function Open-Drain CMOS floating I/O pin don’t care 1 1 0 Alternate Function Push-Pull CMOS floating I/O pin don’t care 1 1 1 |
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