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LRI64-A1S/XXX Fiches technique(PDF) 8 Page - STMicroelectronics

No de pièce LRI64-A1S/XXX
Description  Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO15693 and ISO18000-3 Mode 1 Compliant
PDF  38 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LRI64-A1S/XXX Fiches technique(HTML) 8 Page - STMicroelectronics

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LRI64
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DATA RATE AND DATA CODING
The data coding method involves pulse position
modulation. The LRI64 supports the “1-out-of-4”
pulse coding mode. Any request that the VCD
might send in the “1-out-of-256” pulse coded
mode, is ignored, and the LRI64 remains in its cur-
rent state.
Two bit values are encoded at a time, by the posi-
tioning of a pause of the carrier frequency in one
of four possible 18.88µs (256/fc) time slots, as
shown in Figure 7.
Four successive pairs of bits form a byte. The
transmission of one byte takes 302.08 µs and,
consequently, the data rate is 26.48 kbits/s (fc/
512).
The encoding for the least significant pair of bits is
transmitted first. For example Figure 6. shows the
transmission of E1h (225d, 1110 0001b) by the
VCD.
Figure 7. “1-out-of-4” Coding Mode
AI06658
9.44 µs
9.44 µs
75.52 µs
28.32 µs
9.44 µs
75.52 µs
47.20µs
9.44 µs
75.52 µs
66.08 µs
9.44 µs
75.52 µs
Pulse position for "00"
Pulse position for "11"
Pulse position for "10" (0=LSB)
Pulse position for "01" (1=LSB)



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