M68AW128M datasheet(13/22 Pages) STMICROELECTRONICS

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M68AW128M

Figure 10. Chip Enable or UB/LB Controlled, Standby Mode AC Waveforms

Table 7. Read and Standby Mode AC Characteristics

Note: 1. Test conditions assume transition timing reference level = 0.3VCC or 0.7VCC.

2. At any given temperature and voltage condition, tGHQZ is less than tGLQX, tBHQZ is less than tBLQX and tEHQZ is less than tELQX for

any given device.

3. These parameters are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output

voltage levels.

Symbol

Parameter

M68AW128M

Unit

tAVAV

Read Cycle Time

Min

tAVQV

Address Valid to Output Valid

Max

tAXQX

(1)

Data hold from address change

Min

tBHQZ

(2,3)

Upper/Lower Byte Enable High to Output Hi-Z

Max

tBLQV

Upper/Lower Byte Enable Low to Output Valid

Max

tBLQX

(1)

Upper/Lower Byte Enable Low to Output Transition

Min

tEHQZ

(2,3)

Chip Enable High to Output Hi-Z

Max

tELQV

Chip Enable Low to Output Valid

Max

tELQX

(1)

Chip Enable Low to Output Transition

Min

tGHQZ

(2,3)

Output Enable High to Output Hi-Z

Max

tGLQV

Output Enable Low to Output Valid

Max

tGLQX

(2)

Output Enable Low to Output Transition

Min

tPD

Chip Enable or UB/LB High to Power Down

Max

tPU

Chip Enable or UB/LB Low to Power Up

Min

AI03856

tPD

ICC

tPU

ISB

50%

E, UB, LB

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