ATS692LSH datasheet(10/12 Pages) ALLEGRO

10 / 12 page

Two-Wire, Differential, Vibration Resistant

Sensor IC with Speed and Direction Output

ATS692LSH(RSNPH)

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Application Information

Figure 8. Typical application circuit

ATS692

VCC

GND

TEST

0.01 F

100

BYPASS

Power Derating

The device must be operated below the maximum junction

temperature of the device, TJ(max). Under certain combinations of

peak conditions, reliable operation may require derating supplied

power or improving the heat dissipation properties of the appli-

cation. This section presents a procedure for correlating factors

affecting operating TJ. (Thermal data is also available on the

Allegro website.)

The Package Thermal Resistance, RJA, is a figure of merit sum-

marizing the ability of the application and the device to dissipate

heat from the junction (die), through all paths to the ambient air.

Its primary component is the Effective Thermal Conductivity, K,

of the printed circuit board, including adjacent devices and traces.

Radiation from the die through the device case, RJC, is relatively

small component of RJA. Ambient air temperature, TA, and air

motion are significant external factors, damped by overmolding.

The effect of varying power levels (Power Dissipation, PD), can

be estimated. The following formulas represent the fundamental

relationships used to estimate TJ, at PD.

PD = VIN

× IIN

(1)



T = PD

× RJA

(2)

TJ = TA + ΔT

(3)

For example, given common conditions such as: TA= 25°C,

VCC = 12 V, ICC = 6.5 mA, and RJA = 126 °C/W, then:

PD = VCC

× ICC = 12 V × 6.5 mA = 78 mW

T = PD

× RJA = 78 mW × 126 °C/W = 9.8°C

TJ = TA + T = 25°C + 9.8°C = 34.8°C

A worst-case estimate, PD(max), represents the maximum allow-

able power level (VCC(max), ICC(max)), without exceeding

TJ(max), at a selected RJA and TA.

Example: Reliability for VCC at TA=150°C, package SH, using a

single-layer PCB.

Observe the worst-case ratings for the device, specifically:

RJA=126 °C/W, TJ(max) =165°C, VCC(max) =24 V, and

ICC(mean) = 13 mA. (Note: At maximum target frequency,

ICC(LOW) = 8 mA, ICC(HIGH) = 16 mA, and maximum pulse

widths, the result is a duty cycle of 62.4% and a worst case

ICC(mean) of 13 mA.)

Calculate the maximum allowable power level, PD(max). First,

invert equation 3:

Tmax = TJ(max) – TA = 165°C–150°C = 15°C

This provides the allowable increase to TJ resulting from internal

power dissipation. Then, invert equation 2:

PD(max) = Tmax÷RJA =15°C÷126 °C/W=119 mW

Finally, invert equation 1 with respect to voltage:

VCC(est) = PD(max) ÷ ICC(max)= 119 mW÷13 mA= 9.2 V

The result indicates that, at TA, the application and device can

dissipate adequate amounts of heat at voltages ≤VCC(est).

Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then

reliable operation between VCC(est) and VCC(max) requires

enhanced RJA. If VCC(est) ≥ VCC(max), then operation between

VCC(est) and VCC(max) is reliable under these conditions.

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