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STM8TL52X4 Fiches technique(PDF) 29 Page - STMicroelectronics |
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STM8TL52X4 Fiches technique(HTML) 29 Page - STMicroelectronics |
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29 / 84 page ![]() DocID022344 Rev 7 29/84 STM8TL52x4 STM8TL53x4 Memory and register map 39 0x00 50D3 WWDG WWDG_CR WWDG control register 0x7F 0x00 50D4 WWDG_WR WWDG window register 0x00 50D5 to 0x00 50D7 Reserved area (11 byte) 0x00 50E0 IWDG IWDG_KR IWDG key register 0xXX 0x00 50E1 IWDG_PR IWDG prescaler register 0x00 0x00 50E2 IWDG_RLR IWDG reload register 0xFF 0x00 50E3 to 0x00 50EF Reserved area (13 byte) 0x00 50F0 AWU AWU_CSR AWU control/status register 0x00 0x00 50F1 AWU_APR AWU asynchronous prescaler buffer register 0x3F 0x00 50F2 AWU_TBR AWU timebase selection register 0x00 0x00 50F3 BEEP BEEP_CSR BEEP control/status register 0x1F 0x00 50F4 to 0x00 51FF Reserved area (268 byte) 0x00 5200 SPI SPI_CR1 SPI control register 1 0x00 0x00 5201 SPI_CR2 SPI control register 2 0x00 0x00 5202 SPI_ICR SPI interrupt control register 0x00 0x00 5203 SPI_SR SPI status register 0x00 0x00 5204 SPI_DR SPI data register 0x00 0x00 5205 to 0x00 520F Reserved area (11 byte) Table 7. General hardware register map (continued) Address Block Register label Register name Reset status |
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