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TS110-8 Fiches technique(PDF) 4 Page - STMicroelectronics |
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TS110-8 Fiches technique(HTML) 4 Page - STMicroelectronics |
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4 / 10 page ![]() Characteristics TS110-8 4/10 DocID026589 Rev 1 Figure 5. Relative variation of thermal impedance junction to ambient versus pulse duration Figure 6. Typical thermal resistance junction to ambient versus copper surface under anode (epoxy FR4, Cuth = 35 µm) 0.01 0.10 1.00 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 TO-92 SMBflat-3L Copper surface area = 5cm² T( ) p s K = [Z /R ] th(j-a) th(j-a) Figure 7. Relative variation of gate trigger current and trigger voltage versus junction temperature (typical values) Figure 8. Relative variation of latching and holding current versus junction temperature (typical values) Figure 9. Relative variation of holding current versus gate-cathode resistance (typical values) Figure 10. Relative variation of dV/dt immunity versus junction temperature (typical values) 0.0 0.5 1.0 1.5 2.0 2.5 1.E-01 1.E+00 1.E+01 RK GK () Ω I [ ] / I [ = 2 ] HH RGK RGK 20 Ω 0 1 2 3 4 5 6 7 8 9 10 20 40 60 80 100 120 Tj °C () VV D = 0.67 X DRM GK = 220 R Ω dV/d dV/d 1 tt [T ] / [T = 25°C] jj |
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