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TNETV2664FIBZWT Fiches technique(PDF) 57 Page - Texas Instruments |
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TNETV2664FIBZWT Fiches technique(HTML) 57 Page - Texas Instruments |
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57 / 249 page ![]() TMS320C6424 www.ti.com SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 Table 2-25. Multiplexed GPIO 3.3 V Terminal Functions SIGNAL TYPE(1) OTHER(2) (3) DESCRIPTION ZWT ZDU NAME NO. NO. GPIO 104 out of 111 GPIO pins on the C6424 device are multiplexed with other peripherals pin functions (e.g., PCI, HPI, VLYNQ, EMAC/MDIO, McASP0, McBSP0, McBSP1, Timer 0, Timer 1, UART0, UART1, PWM0, PWM1, PWM2, EMIFA, and the CLKOUT0 pin), see the peripheral-specific Terminal Functions tables for the GPIO multiplexing. (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (2) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see Section 3.9.1 , Pullup/Pulldown Resistors. (3) Specifies the operating I/O supply voltage for each signal Copyright © 2007–2009, Texas Instruments Incorporated Device Overview 57 Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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