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ACST1035-8FP Fiches technique(PDF) 5 Page - STMicroelectronics |
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ACST1035-8FP Fiches technique(HTML) 5 Page - STMicroelectronics |
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5 / 13 page ![]() ACST1035-8FP Characteristics DocID025321 Rev 2 5/13 Figure 8: Non repetitive surge peak on-state current for a sinusoidal pulse with width tp < 10 ms Figure 9: Relative variation of gate trigger current and gate trigger voltage versus junction temperature (typical values) Figure 10: Relative variation of holding current and latching current versus junction temperature (typical values) Figure 11: Relative variation of critical rate of decrease of main current (dI/dt)c versus reapplied (dV/dt)c Figure 12: Relative variation of critical rate of decrease of main current versus junction temperature (typical values) Figure 13: Relative variation of static dV/dt immunity versus junction temperature I (A), I t (A s) TSM 2 2 1 10 100 1000 0.01 0.10 1.00 10.00 dI/dt limitation: 100 A/µs ITSM t ( ms) p Tj initial = 25 °C 0 1 2 3 0.1 1.0 10.0 100.0 T j = 150 °C (dV/dt)c (V/µs) (dl/dt)c[(dV/dt)c] / specified (dl/dt)c 0 1 2 3 4 5 6 7 8 9 10 25 50 75 100 125 150 Tj(°C) (dI/dt ) C [T j ] / (dI/dt )c [T j = 150 °C] 0 1 2 3 4 5 25 50 75 100 125 150 (dV/dt) > 5KV/µs Tj (°C) VD = VR = 536 V dV/dt[Tj] / dV/dt[Tj = 150 °C] |
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