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STM32F411CE Fiches technique(PDF) 69 Page - STMicroelectronics |
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STM32F411CE Fiches technique(HTML) 69 Page - STMicroelectronics |
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69 / 149 page ![]() DocID026289 Rev 6 69/149 STM32F411xC STM32F411xE Electrical characteristics 123 Table 21. Typical and maximum current consumption, code with data processing (ART accelerator disabled) running from SRAM - VDD = 3.6 V Symbol Parameter Conditions fHCLK (MHz) Typ Max(1) Unit TA= 25 °C TA= 85 °C TA= 105 °C TA= 125 °C IDD Supply current in Run mode External clock, PLL ON(2), all peripherals enabled(3)(4) 100 21.7 23.3 23.9 24.3 25.3 mA 84 17.5 19.2(5) 19.4 19.5 20.5 64 12.2 13.2 13.5 14.0 14.9 50 9.6 10.4 10.7 11.2 12.1 20 4.5 5.0 5.3 5.9 6.8 HSI, PLL OFF, all peripherals enabled(3) 16 3.0 3.3 3.6 4.3 5.2 1 0.5 0.7 1.0 1.7 2.6 External clock, PLL OFF(2), all peripherals disabled(3) 100 13.0 14.6(5) 14.6 14.9 16.0 84 10.5 11.9(5) 12.1 12.2 13.2 64 7.4 8.4(5) 8.8 8.9 9.9 50 5.9 6.6 6.8 7.3 8.2 20 2.8 3.3 3.5 4.2 5.1 HSI, PLL OFF, all peripherals disabled(3) 16 1.9 2.1 2.4 3.1 4.0 1 0.4 0.5 0.9 1.6 2.5 1. Guaranteed by characterization results. 2. Refer to Table 41 and RM0383 for the possible PLL VCO setting 3. When analog peripheral blocks such as ADC, HSE, LSE, HSI, or LSI are ON, an additional power consumption has to be considered. 4. When the ADC is ON (ADON bit set in the ADC_CR2 register), add an additional power consumption of 1.6 mA for the analog part. 5. Guaranteed by test in production. |
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