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TLV70235DBVT Fiches technique(PDF) 14 Page - Texas Instruments |
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TLV70235DBVT Fiches technique(HTML) 14 Page - Texas Instruments |
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14 / 33 page ![]() 1ms/div V OUT V IN 2.9V 2.3V V =1.8V I 1mA OUT OUT = SlewRate=1V/ s m 10 s/div m V OUT I OUT 50mA 0mA t =t =1 s R F m V OUT =1.8V TLV702 SLVSAG6C – SEPTEMBER 2010 – REVISED MARCH 2015 www.ti.com Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1- μF to 1- μF, low ESR capacitor across the IN pin and GND pin of the regulator. This capacitor counteracts reactive input sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated, or if the device is not located close to the power source. If source impedance is more than 2 Ω, a 0.1-μF input capacitor may be necessary to ensure stability. 8.2.2.2 Transient Response As with any regulator, increasing the size of the output capacitor reduces overshoot and undershoot magnitude but increases the duration of the transient response. 8.2.3 Application Curves Figure 26. Load Transient Response Figure 27. Line Transient Response 14 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: TLV702 |
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