LIS2HH12 datasheet(17/47 Pages) STMICROELECTRONICS

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DocID025344 Rev 5

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LIS2HH12

Application hints

Figure 5. LIS2HH12 electrical connections

The device core is supplied through the Vdd line while the I/O pads are supplied through the

Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 μF aluminum) should

be placed as near as possible to pin 9 of the device (common design practice).

All the voltage and ground supplies must be present at the same time to have proper

behavior of the IC (refer to Figure 5). It is possible to remove Vdd while maintaining Vdd_IO

without blocking the communication bus, in this condition the measurement chain is

powered off.

The functionality of the device and the measured acceleration data are selectable and

accessible through the I2C or SPI interfaces. When using the I2C, CS must be tied high (i.e.

connected to Vdd_IO).

The functions, the threshold and the timing of the two interrupt pins (INT1 and INT2) can be

completely programmed by the user through the I2C/SPI interface.

4.1

Soldering information

The LGA package is compliant with the ECOPACK®, RoHS and “Green” standard.

It is qualified for soldering heat resistance according to JEDEC J-STD-020.

Leave “Pin 1 Indicator” unconnected during soldering.

Land pattern and soldering recommendations are available at www.st.com.

Digital signal from/to signal controller.Signal levels are defined by proper selection of Vdd_IO

Vdd_IO

10μF

Vdd

100nF

GND

SCL/SPC

SDA/SDI/SDO

SDO/SA0

GND

Vdd_IO

GND

Vdd

100nF

LIS2HH12 Fiches technique(PDF) 17 Page - STMicroelectronics