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WM8727ED/V Fiches technique(PDF) 6 Page - Wolfson Microelectronics plc

No de pièce WM8727ED/V
Description  24 BIT 192 KHZ STEREO DAC
PDF  16 Pages
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Fabricant  WOLFSON [Wolfson Microelectronics plc]
Site Internet  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8727ED/V Fiches technique(HTML) 6 Page - Wolfson Microelectronics plc

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WM8727
Production Data
w
PD Rev 4.1 April 2004
6
TERMINOLOGY
1.
Signal-to-noise ratio (dB) - SNR is a measure of the difference in level between the full scale output and the output with no
signal applied. (No Auto-zero or Automute function is employed in achieving these results).
2.
Dynamic range (dB) - DNR is a measure of the difference between the highest and lowest portions of a signal. Normally a
THD+N measurement at 60dB below full scale. The measured signal is then corrected by adding the 60dB to it. (e.g.
THD+N @ -60dB= -32dB, DR= 92dB).
3.
THD+N (dB) - THD+N is a ratio, of the rms values, of (Noise + Distortion)/Signal.
4.
Stop band attenuation (dB) - Is the degree to which the frequency spectrum is attenuated (outside audio band).
5.
Channel Separation (dB) - Also known as Cross-Talk. This is a measure of the amount one channel is isolated from the
other. Normally measured by sending a full scale signal down one channel and measuring the other.
MASTER CLOCK TIMING
MCLK
t
MCLKL
t
MCLKH
t
MCLKY
Figure 1 Master Clock Timing Requirements
Test Conditions
VDD = 5V, GND = 0V, TA = +25
oC, fs = 48kHz, MCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
System Clock Timing Information
MCLK Master clock pulse width high
tMCLKH
8
ns
MCLK Master clock pulse width low
tMCLKL
8
ns
MCLK Master clock cycle time
tMCLKY
20
ns
MCLK Duty cycle
40:60
60:40
Time from MCLK stopping to power
down.
1.5
12
µs
DIGITAL AUDIO INTERFACE
BCKIN
LRCIN
t
BCH
t
BCL
t
BCY
DIN
t
LRSU
t
DS
t
LRH
t
DH
Figure 2 Digital Audio Data Timing



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